# EC GATE 2014 PAPER 01 (Test 2)

Tag: ec gate 2014 paper 01
Q.1
The digital logic shown in the figure satisfies the given state diagram when Q1 is connected to input A of the XOR gate.

Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram ?
A.  Input A is connected to
B.  Input A is connected to Q2
C.  Input A is connected to  and S is complemented
D. Input A is connected to
Explaination / Solution:
No Explaination.

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Q.2
A good current buffer has
A. low input impedance and low output impedance
B. low input impedance and high output impedance
C. high input impedance and low output impedance
D. high input impedance and high output impedance
Explaination / Solution:
No Explaination.

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Q.3
In the ac equivalent circuit shown in the figure, if iin is the input current and Rf is very larger, the type of feedback is

A. voltage-voltage feedback
B. voltage-current feedback
C. current-voltage feedback
D. current-current feedback
Explaination / Solution:

From the circuit, we observe that output is Vout (Voltage). Feedback is current through resistance Rf , which is added to input current iin . Thus, the configuration is voltage-current feedback.

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Q.4
In the circuit shown, the op-amp has finite input impedance, infinite voltage gain and zero input offset voltage. The output voltage Vout is

A.

-I2 (R1 + R2)

B.

I2R2

C.

I1R2

D.

-I1 (R1 + R2)

Explaination / Solution:

Given that the op-amp has infinite voltage gain, i.e.

AOL

and zero input offset voltage

VIO = 0

So, we redraw the op-amp circuit as

Hence, the current I1 is drawn through resistance R2. So, the output voltage is

Vout = I1R2

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Q.5
In the figure, assume that the forward voltage drops of the PN diode D1 and Schottky diode D2 are 0 7. V and 0 3. V, respectively. If ON denotes conducting state of the diode and OFF denotes non-conducting state of the diode, then in the circuit,

A.  both D1 and D2 are ON
B. D1 is ON and D2 is OFF
C. both D1 and D2 are OFF
D. D1 is OFF and D2 is ON
Explaination / Solution:

Alternatively, we can solve the problem by considering the current through two diodes. Here, the correct case is only considered.
Case : Diode D1 is OFF, D2 is ON. For this case. The equivalent circuit is

From the circuit, we have
I1 = 0
I2 = 10 - 2.3/1.02
= 9.7/1.02
= 9.5 mA
Since, the current I2 is positive, So our assumption is correct.

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Q.6
If fixed positive charges are present in the gate oxide of an n-channel enhancement type MOSFET, it will lead to
A. a decrease in the threshold voltage
B. channel length modulation
C. an increase in substrate leakage current
D. an increase in accumulation capacitance
Explaination / Solution:

If fixed positive charges are present is the gate oxide of an n-channel enhancement type MOSFET, it will lead to a decrease in the threshold voltage.

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Q.7
In the following circuit employing pass transistor logic, all NMOS transistors are identical with a threshold voltage of 1 V . Ignoring the body-effect, the output voltages at P, Q and R are,

A. 4V, 3V, 2V
B. 5V, 5V, 5V
C. 4V, 4V, 4V
D. 5V, 4V, 3V
Explaination / Solution:
No Explaination.

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Q.8
The doping concentrations on the p-side and n-side of a silicon diode are 1 × 1016 cm-3 and 1 × 1017 cm-3, respectively. A forward bias of 0 3. V is applied to the diode. At T = 300 K, the intrinsic carrier concentration of silicon ni = 1.5 × 1010 cm-3 and (kT/q) = 26 mV.  The electron concentration at the edge of the depletion region on the p-side is
A. 2.3 × 109 cm-3
B.  1 × 1016 cm-3
C. 1 × 1017 cm-3
D. 2.25 × 106 cm-3
Explaination / Solution:

Given the doping concentration on p-side
NA = 1 × 1016 cm-3
V = 0.3 V
Intrinsic carrier concentration,

So, the equilibrium electron concentration on the p-side is

Therefore, the electron at the edge of the depletion region on the p-side is obtained as

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Q.9
For a parallel plate transmission line, let v be the speed of propagation and Z be the characteristic impedance. Neglecting fringe effects, a reduction of the spacing between the plates by a factor of two results in
A. halving of v and no change in Z
B. no changes in v and halving of Z
C. no change in both v and Z
D. halving of both v and Z
Explaination / Solution:
No Explaination.

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Q.10
Consider the feedback system shown in the figure. The Nyquist plot of G (s) is also shown. Which one of the following conclusions is correct ?

A. G (s) is an all pass filter
B. G (s) is a strictly proper transfer function
C. G (s) is a stable and minimum phase transfer function
D. The closed-loop system is unstable for sufficiently large and positive k
Explaination / Solution:

Given the feedback system and the Nyquist plot of G (s)is

For the given system, we have the open loop transfer function as
G (s) = KG (s)
Considering the open loop system G (s) is stable, we have no open loop poles in right half plane
P = 0
From Nyquist theorem, we know that
N = P - Z
Where N is the number of encirclements of (-1 + j0), P is number of open loop poles in right half plane, Z is number of closed loop poles in right half plane. For stability, we must have
Z = 0
N = 0,   if closed loop system is stable
≠ 0,   if closed loop system is unstable
observing the Nyquist plot, we conclude that the plot of KG(s) encircles (-1 + j0)
if  K> 1
Hence, N ≠ 0 for sufficient large and positive value of K . Thus, the closedsystem is unstable for sufficiently large and positive K .

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