Analog and Digital Electronics (Test 4)

Gate Exam : Ee Electrical Engineering

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Analog and Digital Electronics
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Q.1
A two – bit counter circuit is shown below

It the state QAQof the counter at the clock time tn is ‘10’ then the state QAQB of the counter at tn + 3 (after three clock cycles ) will be
A. 00
B. 01
C. 10
D. 11
Explaination / Solution:

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Q.2
A JK flip flop can be implemented by T flip-flops. Identify the correct implementation.
A.
B.
C.
D.
Explaination / Solution:

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Q.3
The Boolean expression  simplifies to
A.
B.
C.
D. AB + BC
Explaination / Solution:

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Q.4
In an 8085 microprocessor, the contents of the Accumulator, after the following instructions are executed will become XRA A MVI B, F0H SUB B
A. 01 H
B. 0F H
C. F0 H
D. 10 H
Explaination / Solution:

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Q.5
An 8085 assembly language program is given below.
Line 1:   MVI A, B5H
2:   MVI B, OEH
3:   XRI 69H
5:   ANI 9BH
6:   CPI 9FH
7:   STA 3010H
8:   HLT
After execution of line 7 of the program, the status of the CY and Z flags will be
A. CY = 0, Z = 0
B. CY = 0, Z = 1
C. CY = 1, Z = 0
D. CY = 1, Z = 1
Explaination / Solution:
No Explaination.

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Q.6
Match the logic gates in Column A with their equivalents in Column B

A. P-2, Q-4, R-1, S-3
B. P-4, Q-2, R-1, S-3
C. P-2, Q-4, R-3, S-1
D. P-4, Q-2, R-3, S-1
Explaination / Solution:

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Q.7
The following FIVE instructions were executed on an 8085 microprocessor. MVI A, 33H MVI B, 78H ADD B CMA ANI 32H The Accumulator value immediately after the execution of the fifth instruction is
A. 00H
B. 10H
C. 11H
D. 32H
Explaination / Solution:

MVI A, 33H A⟵33H MVI B, 78H B⟵78H ADD B B⟵ABH CMA A⟵54H ANI 32H A⟵10H A⟶0011 0011 A⟶1010 1011 0101 0100 B⟶0111 1000 B⟶0101 0100 0011 0010 1010 1011 0001 0000
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Q.8
The output F in the digital logic circuit shown in the figure is

A.
B.
C.
D.
Explaination / Solution:

In the logic circuit, the two inputs to the output AND gate are

So, we have the output

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Q.9
The output of a 3-stage Johnson (twisted ring) counter is fed to a digital-to analog (D/A) converter as shown in the figure below. Assume all the states of the counter to be unset initially. The waveform which represents the D/A converter output v0 is

A.
B.
C.
D.
Explaination / Solution:

All the states of the counter are initially unset.

State Initially are shown below in table:
Q2Q1Q0
0  0  0  0
1  0  0  4
1  1  0  6
1  1  1  7
0  1  1  3
0  0  1  1
0  0  0  0

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Q.10
There are four chips each of 1024 bytes connected to a 16 bit address bus as shown in the figure below, RAMs 1, 2, 3 and 4 respectively are mappped to addresses

A. 0C00H-0FFFH, 1C00H-1FFFH, 2C00H-2FFFH, 3C00H-3FFFH
B. 1800H-1FFFH, 2800H-2FFFH, 3800H-3FFFH, 4800H-4FFFH
C. 0500H-08FFH, 1500H-18FFH, 3500H-38FFH, 5500H-58FFH
D. 0800H-0BFFH, 1800H-1BFFH, 2800H-2BFFH, 3800H-3BFFH