Topic: Digital Logic (Test 1)



Topic: Digital Logic
Q.1
What is the minimum number of gates required to implement the Boolean function (AB + C) if we have to use only 2-input NOR gates?
A. 2
B. 3
C. 4
D. 5
Answer : Option B
Explaination / Solution:
No Explaination.


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Q.2
Consider the following minterm expression for F. F(P,Q,R,S) = ∑ 0, 2, 5, 7, 8, 10, 13, 15 The minterms 2, 7, 8 and 13 are ‘do not care terms. The minimal sum of-products form for F is
A.
B.
C.
D.
Answer : Option B
Explaination / Solution:



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Q.3
Consider the following combinational function block involving four Boolean variables x, y, a, b where x, a, b are inputs and y is the output.
f (x, y, a, b)
{
if (x is 1) y = a;
else y = b; 
}
Which one of the following digital logic blocks is the most suitable for implementing this function? 
A. Full adder
B. Priority encoder
C. Multiplexor
D. Flip-flop
Answer : Option C
Explaination / Solution:


‘x’ is working as selection line, where the two input lines are ‘a’ and ‘b’, so the function F (x, y,a,b) can be implemented using (2× 1) multiplexer as follows: 


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Q.4

The above synchronous sequential circuit built using JK flip-flops is initialized with Q2Q1Q0 = 000. The state sequence for this circuit for the next 3 clock cycles is
A. 001, 010, 011
B. 111, 110, 101
C. 100, 110, 111
D. 100, 011, 001
Answer : Option C
Explaination / Solution:



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Q.5
 Let ⊕ denote the Exclusive OR (XOR) operation. Let ‘1’ and ‘0’ denote the binary constants. Consider the following Boolean expression for F over two variables P and Q.
F(P,Q) = ((1⊕P)⊕(P⊕Q))⊕((P⊕Q)⊕(Q⊕0))
The equivalent expression for F is
A. P + Q
B.
C. P ⊕ Q
D.
Answer : Option D
Explaination / Solution:



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Q.6
The minterm expansion of f 
A. m2 + m4 + m6 + m7
B. m0 + m1 + m3 + m5
C. m0 + m1 + m6 + m7
D. m2 + m3 + m4 + m5
Answer : Option A
Explaination / Solution:
No Explaination.


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Q.7
P is a 16-bit signed integer. The 2’s complement representation of P is (F87B)16. The 2’s complement representation of 8*P is 
A. (C3D8)16
B. (187B)16
C. (F878)16
D. (987B)16
Answer : Option A
Explaination / Solution:
No Explaination.


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Q.8
The Boolean expression for the output f of the multiplexer shown below is 

A.
B. P ⊕ Q ⊕ R
C. P + Q + R
D.
Answer : Option A
Explaination / Solution:
No Explaination.


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Q.9
The simplified SOP (Sum of Product) form of the Boolean expression 
 is
A.
B.
C.
D. (PQ + R)
Answer : Option B
Explaination / Solution:



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Q.10
Which one of the following circuits is NOT equivalent to a 2-input XNOR (exclusive NOR) gate?
A.
B.
C.
D.
Answer : Option D
Explaination / Solution:

All options except option ‘D’ gives EX-NOR gates

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