Digital Circuits - Online Test
Q1. For the circuit shown, the counter state (Q1Q0) follows the sequence
Answer : Option A
Explaination / Solution:
Q2. An 8255 chip is interfaced to an 8085 microprocessor system as an I/O mapped
I/O as show in the figure. The address lines A0 and A1 of the 8085 are used
by the 8255 chip to decode internally its thee ports and the Control register.
The address lines A3 to A as well as the 
signal are used for address
decoding. The range of addresses for which the 8255 chip would get selected is
signal are used for address
decoding. The range of addresses for which the 8255 chip would get selected is
Answer : Option C
Explaination / Solution:
Q3. An 8085 assembly language program is given below.
Line 1: MVI A, B5H
2: MVI B, OEH
3: XRI 69H
4: ADD B
5: ANI 9BH
6: CPI 9FH
7: STA 3010H
8: HLT
The contents of the accumulator just execution of the ADD instruction in line 4 will be
Answer : Option B
Explaination / Solution:
Line 1 : MVI A, B5H ; Move B5H to A
2 : MVI B, 0EH ; Move 0EH to B
3 : XRI 69H ; [A] XOR 69H and store in A
; Contents of A is CDH
4 : ADDB ; Add the contents of A to contents of B and
; store in A, contents of A is EAH
5 : ANI 9BH ; [a] AND 9BH, and store in A,
; Contents of A is 8 AH
6 : CPI 9FH ; Compare 9FH with the contents of A
; Since 8 AH < 9BH, CY = 1
7 : STA 3010 H ; Store the contents of A to location 3010 H
8 : HLT ; Stop
Thus the contents of accumulator after execution of ADD instruction is EAH.
Q4. An 8085 assembly language program is given below.
Line 1: MVI A, B5H
2: MVI B, OEH
3: XRI 69H
4: ADD B
5: ANI 9BH
6: CPI 9FH
7: STA 3010H
8: HLT
After execution of line 7 of the program, the status of the CY and Z flags will be
Answer : Option C
Explaination / Solution:
No Explaination.
Q5. In the Digital-to-Analog converter circuit shown in the figure below, VR = 1V and R = 1kΩ
The current i is
Answer : Option B
Explaination / Solution:
Q6. An 8085 executes the following instructions
2710 LXI H, 30A0 H
2713 DAD H
2414 PCHL
All address and constants are in Hex. Let PC be the contents of the program counter and HL be the contents of the HL register pair just after executing PCHL. Which of the following statements is correct ?
Answer : Option C
Explaination / Solution:
2710H LXI H, 30A0H ; Load 16 bit data 30A0 in HL pair
2713H DAD H ; 6140H ⟶ HL
2714H PCHL ; Copy the contents 6140H of HL in PC
Thus after execution above instruction contests of PC and HL are same and that is 6140H
Q7. The two numbers represented in signed 2’s complement form are P + 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s complement is
Answer : Option B
Explaination / Solution:
Q8. Which of the following Boolean Expressions correctly represents the relation
between P,Q,R and M1
Answer : Option D
Explaination / Solution:
Q9. For the circuit shown in the following, I0 - I3 are inputs to the 4:1 multiplexers,
R(MSB) and S are control bits. 
The output Z can be represented by
Answer : Option A
Explaination / Solution:
Q10. 
For each of the positive edge-triggered J - K flip flop used in the following figure, the propagation delay is Δt .
Which of the following wave forms correctly represents the output at Q1?
Answer : Option B
Explaination / Solution:
Since the input to both JK flip-flop is 11, the output will change every time with clock pulse. The input to clock is
The output Q0 of first FF occurs after time ΔT and it is as shown below
The output Q1 of second FF occurs after time ΔT when it gets input (i.e. after ΔT from t1) and it is as shown below
