Digital Circuits - Online Test
Q1. The following Karnaugh map represent a function F.
Which of the following circuits is a realization of the above function F?
Answer : Option D
Explaination / Solution:
No Explaination.
Q2. The increasing order of speed of data access for the following devices is
i. Cache Memory
ii. CDROM
iii. Dynamic RAM
iv. Processor Registers
v. Magnetic Tape
Answer : Option B
Explaination / Solution:
No Explaination.
Q3. The complete set of only those Logic Gates designated as Universal Gates is
Answer : Option C
Explaination / Solution:
No Explaination.
Q4. In an 8085 microprocessor, the contents of the Accumulator, after the following instructions are executed will become
XRA A
MVI B, F0H
SUB B
Answer : Option D
Explaination / Solution:
Q5. X = and Y = are two 5-bit binary numbers represented in two’s complement format. The sum of X and Y represented in two’s complement format using 6 bits is
Answer : Option C
Explaination / Solution:
MSB of Y is 1, thus it is negative number and X is positive number
In signed two’s complements from 7 is
Q6. The Boolean function Y = AB + CD is to be realized using only 2 - input NAND gates. The minimum number of gates required is
Answer : Option B
Explaination / Solution:
This is SOP form and we require only 3 NAND gate
Q7. The Boolean expression 
can be
minimized to
can be
minimized to
Answer : Option D
Explaination / Solution:
Q8. The circuit diagram of a standard TTL NOT gate is shown in the figure. Vi = 25 V, the modes of operation of the transistors will be
Answer : Option B
Explaination / Solution:
No Explaination.
Q9. In the following circuit, X is given by
Answer : Option A
Explaination / Solution:
Q10. The following binary values were applied to the X and Y inputs of NAND latch
shown in the figure in the sequence indicated below : 
X = ,Y = X = ,Y = X = Y =
The corresponding stable P Q, output will be
Answer : Option C
Explaination / Solution:
No Explaination.
