Q6.The logical gate implemented using the circuit shown below where. V1 and V2 are inputs (with
0 V as digital 0 and 5 V as digital 1) and Vout is the output is
Answer : Option BExplaination / Solution:
So, this logic level o/p is showing the functionality of NOR-gate.
The TTL circuit shown in the figure is fed with the waveform X (also shown). All gates have equal propagation delay of 10ns. The output Y of the circuit is
Answer : Option AExplaination / Solution: No Explaination.
Q9.When a “CALL Addr” instruction is executed, the CPU carries out the following sequential operations internally:
Note:
(R) means content of register R
((R)) means content of memory location pointed to by R
PC means Program Counter
SP means Stack Pointer
Answer : Option DExplaination / Solution: No Explaination.