EE GATE 2014 PAPER 02 - Online Test
Q1. An input signal x(t) = 2 + 5sin (100πt) is sampled with a sampling frequency of 400 Hz and
applied to the system whose transfer function is represented by
where, N represents the number of samples per cycle. The output y(n) of the system under steady state is
Answer : Option C
Explaination / Solution:
Q2. For a single phase, two winding transformer, the supply frequency and voltage are both increased by 10%. The percentage changes in the hysteresis loss and eddy current loss, respectively, are
Answer : Option A
Explaination / Solution:
Q3. The state transition matrix for the system
is
is
Answer : Option C
Explaination / Solution:
Q4. For the transfer function
The values of the constant gain term and the highest corner frequency of the Bode plot respectively are
Answer : Option A
Explaination / Solution:
Q5. To evaluate the double integral 
we make the substitution 
The integral will reduce to
we make the substitution The integral will reduce to
Answer : Option B
Explaination / Solution:
Q6. The second order dynamic system
has the matrices P, Q and R as follows:
The system has the following controllability and observability properties:
Answer : Option C
Explaination / Solution:
Q7. The minimum value of the function f(x) = x3 - 3x2 - 24x +
100 in the interval [-3. 3] is
Answer : Option B
Explaination / Solution:
Q8. The switch SW shown in the circuit is kept at position ‘1’ for a long duration.
At
t
= 0+, the switch is moved to position ‘2’. Assuming |Vo2| > |Vo1|, the voltage vc(t) across the capacitor is
Answer : Option D
Explaination / Solution:
Q9. 
A parallel plate capacitor consisting two dielectric materials is shown in the figure. The middle dielectric slab is place symmetrically with respect to the plates.
If the potential difference between one of the plates and the nearest surface of dielectric
interface is 2Volts, then the ratio ε1:ε2 is
Answer : Option C
Explaination / Solution:
Q10. 
Assuming an ideal transformer,. The Thevenin’s equivalent voltage and impedance as seen from the terminals x and y for the circuit in figure are
Answer : Option A
Explaination / Solution:
