EC GATE 2011 - Online Test
Q1. A four-phase and an eight-phase signal constellation are shown in the figure
below.
For the constraint that the minimum distance between pairs of signal points be
d for both constellations, the radii r1, and r2 of the circles are
Answer : Option D
Explaination / Solution:
Four phase signal constellation is shown below
d2 = r12 + r12
d2 = 2r12
r1 = d/√2 = 0.707d
Q2. A four-phase and an eight-phase signal constellation are shown in the figure
below.
Assuming high SNR and that all signals are equally probable, the additional
average transmitted signal energy required by the 8-PSK signal to achieve the
same error probability as the 4-PSK signal is
Answer : Option D
Explaination / Solution:
Here Pe for 4 PSK and 8 PSK is same because Pe depends on d . Since Pe is same,
d is same for 4 PSK and 8 PSK.
Additional Power SNR
Q3. A system is defined by its impulse response 
The system is
The system is
Answer : Option B
Explaination / Solution:
No Explaination.
Q4. If the unit step response of a network is (1 – e-αt), then its unit impulse response is
Answer : Option A
Explaination / Solution:
Q5. An input 
is applied to an LTI system with
impulse response h(t) = u(t). The output is
is applied to an LTI system with
impulse response h(t) = u(t). The output is
Answer : Option D
Explaination / Solution:
and h(t) = u(t)
and h(t) = u(t)Taking Laplace Transform we get
Q6. The output Y in the circuit below is always ‘1’ when
Answer : Option B
Explaination / Solution:
The given circuit is shown below:
If any two or more inputs are ‘1’ then output y will be 1.
Q7. The circuit shown below is driven by a sinusoidal input Vi = Vpcos(t/RC). The
steady state output vo
Answer : Option A
Explaination / Solution:
parallel combination of R and C equivalent impedance is
Transfer function can be written as
Q8. When the output Y in the circuit below is ‘1’, it implies that data has
Answer : Option A
Explaination / Solution:
No Explaination.
Q9. The logic function implemented by the circuit below is (ground implies logic 0)
Answer : Option D
Explaination / Solution:
Q10. The output of a 3-stage Johnson (twisted ring) counter is fed to a digital-to
analog (D/A) converter as shown in the figure below. Assume all the states
of the counter to be unset initially. The waveform which represents the D/A
converter output v0 is
Answer : Option A
Explaination / Solution:
All the states of the counter are initially unset.
State Initially are shown below in table:
Q2Q1Q0
0 0 0 0
1 0 0 4
1 1 0 6
1 1 1 7
0 1 1 3
0 0 1 1
0 0 0 0
