Q1.The two numbers represented in signed 2’s complement form are P + 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s complement is
For the circuit shown in the figure, D has a transition from 0 to 1 after CLK changes from 1 to 0. Assume gate delays to be negligible. Which of the following statements is true
Answer : Option AExplaination / Solution: No Explaination.
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relationVolts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
The stable reading of the LED displays is
Answer : Option DExplaination / Solution:
and when VADC = 6.5 V (at 1101), the output of AND is zero and the counter stops. The stable output of LED display is 13.
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relationVolts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
The magnitude of the error between VDAC and Vin at steady state in volts is
Answer : Option BExplaination / Solution: No Explaination.
Q8.The input and output of a continuous time system are respectively denoted by x(t) and y(t). Which of the following descriptions corresponds to a causal system ?
Answer : Option CExplaination / Solution:
The output of causal system depends only on present and past states only.
In option (A) y(0) depends on x(- 2) and x(4).
In option (B) y(0) depends on x(1).
In option (C) y(0) depends on x(- 1).
In option (D) y(0) depends on x(5).
Thus only in option (C) the value of y(t) at t = 0 depends on x(- 1) past value.
In all other option present value depends on future value.
Q9.The impulse response h(t) of a linear time invariant continuous time system is
described by where u(-t) denotes the unit
step function, and α and β are real constants. This system is stable if
Answer : Option DExplaination / Solution:
This system is stable only when bounded input has bounded output For stability αt < 0 for t > 0 that implies α < 0 and βt > 0 for t > 0 that implies β > 0. Thus, α is negative and β is positive.