EC GATE 2007 - Online Test

Q1. The Boolean expression  can be minimized to
Answer : Option D
Explaination / Solution:



Q2. The circuit diagram of a standard TTL NOT gate is shown in the figure. Vi = 25 V, the modes of operation of the transistors will be 

Answer : Option B
Explaination / Solution:
No Explaination.


Q3. In the following circuit, X is given by

Answer : Option A
Explaination / Solution:



Q4. The following binary values were applied to the X and Y inputs of NAND latch shown in the figure in the sequence indicated below : 
X =    ,Y =    X =    ,Y =    X =    Y =   
The corresponding stable P Q, output will be

Answer : Option C
Explaination / Solution:
No Explaination.


Q5. For the circuit shown, the counter state (Q1Q0) follows the sequence

Answer : Option A
Explaination / Solution:



Q6. An 8255 chip is interfaced to an 8085 microprocessor system as an I/O mapped I/O as show in the figure. The address lines A0 and A1 of the 8085 are used by the 8255 chip to decode internally its thee ports and the Control register. The address lines A3 to A as well as the  signal are used for address decoding. The range of addresses for which the 8255 chip would get selected is

Answer : Option C
Explaination / Solution:


                                     

Q7. An 8085 assembly language program is given below. 
Line 1:   MVI A, B5H 
        2:   MVI B, OEH 
        3:   XRI 69H 
        4:   ADD B 
        5:   ANI 9BH 
        6:   CPI 9FH 
        7:   STA 3010H 
        8:   HLT
The contents of the accumulator just execution of the ADD instruction in line 4 will be
Answer : Option B
Explaination / Solution:

Line 1 : MVI A, B5H ; Move B5H to A
        2 : MVI B, 0EH ; Move 0EH to B
        3 : XRI 69H      ; [A] XOR 69H and store in A
                                 ; Contents of A is CDH
        4 : ADDB          ; Add the contents of A to contents of B and
                                 ; store in A, contents of A is EAH
        5 : ANI 9BH      ; [a] AND 9BH, and store in A,
                                 ; Contents of A is 8 AH
        6 : CPI 9FH      ; Compare 9FH with the contents of A
                                 ; Since 8 AH < 9BH, CY = 1
       7 : STA 3010 H  ; Store the contents of A to location 3010 H 
       8 : HLT               ; Stop
Thus the contents of accumulator after execution of ADD instruction is EAH. 


Q8. An 8085 assembly language program is given below. 
Line 1:   MVI A, B5H 
        2:   MVI B, OEH 
        3:   XRI 69H 
        4:   ADD B 
        5:   ANI 9BH 
        6:   CPI 9FH 
        7:   STA 3010H 
        8:   HLT
After execution of line 7 of the program, the status of the CY and Z flags will be
Answer : Option C
Explaination / Solution:
No Explaination.


Q9. In the Digital-to-Analog converter circuit shown in the figure below, VR = 1V and R = 1kΩ

The current i is
Answer : Option B
Explaination / Solution:




Q10. If the Laplace transform of a signal  then its final value is
Answer : Option D
Explaination / Solution:


Final value theorem is applicable only when all poles of system lies in left half of S -plane. Here s = 1 is right s −plane pole. Thus it is unbounded.