CS GATE 2011 - Online Test
Q1. Consider the following circuit involving three D-type flip-flops used in a certain
type of counter configuration.
If all the flip-flops were reset to 0 at power on, what is the total number of
distinct outputs (states) represented by PQR generated by the counter?
Answer : Option C
Explaination / Solution:
So Total number of distinct outputs is 4
Q2. Few school curricula include a unit on how to deal with bereavement and
grief, and yet all students at some point in their lives suffer from losses
through death and parting.
Based on the above passage which topic would not be included in a unit on
bereavement?
Answer : Option C
Explaination / Solution:
The given passage clearly deals with how to deal with bereavement and grief and
so after the tragedy occurs and not about precautions. Therefore, irrespective of
the causes of death, a school student rarely gets into details of causes—which is
beyond the scope of the context. Rest all are important in dealing with grief.
Q3. Let P be a regular language and Q be a context free language such that Q ⊆ P.
(For example, let P be the language represented by the regular expression p*q*
and Q be {pn qn | n ∈ N}). Then which of the following is ALWAYS regular?
Answer : Option C
Explaination / Solution:
Σ* − P is the complement of P so it is always regular,
since regular languages are closed under complementation
Q4. Database table by name Loan_Records is given below.
Borrower Bank_Manager Loan_ Amount
Ramesh Sunderajan 10000.00
Suresh Ramgopal 5000.00
Mahesh Sunderajan 7000.00
What is the output of the following SQL query?
SELECT count(*)
FROM(
(SELECT Borrower. Bank_Manager FROM Loan_Records) AS S
NATURAL JOIN
(SELECT Bank_Manager, Loan_Amount FROM Loan_Records) AS T
);
Answer : Option C
Explaination / Solution:
After executing the given query, the output would be
Q5. On a non-pipelined sequential processor, a program segment, which is a part of
the interrupt service routine, is given to transfer 500 bytes from an I/O device to
memory.
Initialize the address register
Initialize the count to 500
LOOP: Load a byte from device
Store in memory at address given by address register
Increment the address register
Decrement the count
If count != 0 go to LOOP
Assume that each statement in this program is equivalent to a machine
instruction which takes one clock cycle to execute if it is a non-load/store
instruction. The load-store instructions take two clock cycles to execute.
The designer of the system also has an alternate approach of using the DMA
controller to implement the same transfer. The DMA controller requires 20 clock
cycles for initialization and other overheads. Each DMA transfer cycle takes two
clock cycles to transfer one byte of data from the device to the memory.
What is the approximate speedup when the DMA controller based design is used
in place of the interrupt driven program based input-output?
Answer : Option A
Explaination / Solution:
No. of clock cycles required by using load-store approach = 2 + 500 × 7 = 3502
and that of by using DMA = 20 + 500 × 2 = 1020
Required speed up = 3502/1020 = 3.4
Q6. Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration.
If at some instance prior to the occurrence of the clock edge, P. Q and R have a
value 0, 1 and 0 respectively, what shall be the value of PQR after the clock
edge?
Answer : Option D
Explaination / Solution:
From the Table Shown in the explanation of question 50, if first state is 010 next
State is 011
Q7. A thread is usually defined as a ‘light weight process’ because an operating
system (OS) maintains smaller data structures for a thread than for a process. In
relation to this, which of the followings is TRUE?
Answer : Option A
Explaination / Solution:
No Explaination.
Q8. Which of the following pairs have DIFFERENT expressive power?
Answer : Option B
Explaination / Solution:
NPDA is more powerful than DPDA.
Q9. Consider a database table T containing two columns X and Y each of type integer.
After the creation of the table, one record (X= 1, Y=l) is inserted in the table.
Let MX and MY denote the respective maximum values of X and Y among all
records in the table at any point in time. Using MX and MY, new records are
inserted in the table 128 times with X and Y values being MX+1, 2*MY+1
respectively. It may be noted that each time after the insertion, values of MX and
MY change.
What will be the output of the following SQL query after the steps mentioned
above are carried out?
SELECT Y FROM T WHERE X=7;
Answer : Option A
Explaination / Solution:
Q10. K4 and Q3 are graphs with the following structures
Which one of the following statements is TRUE in relation to these graphs?
Answer : Option B
Explaination / Solution:
Both K4 and Q3 are planar
