Electronic Devices (Test 3)

Gate Exam : Ec Electronics And Communication Engineering

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Electronic Devices

Electronic Devices
| Electronic Devices |
Q.1
In the CMOS inverter circuit shown, if the trans conductance parameters of the NMOS and PMOS transistors are
and their threshold voltages ae   the current I is

A. 0 A
B. 25 μA
C. 45 μA
D. 90 μA
Answer : Option D
Explaination / Solution:



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Q.2
The figure shows the high-frequency capacitance - voltage characteristics of Metal/Sio2/silicon (MOS) capacitor having an area of 1 × 10-4 cm2. Assume that the permittivities (ε0εr) of silicon and Sio are 1 × 10-12 F/cm and 3.5 × 10-13 F/ cm respectively.
The gate oxide thickness in the MOS capacitor is
A. 50 nm
B. 143 nm
C. 350 nm
D. 1 μm
Answer : Option A
Explaination / Solution:



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Q.3
In the figure, assume that the forward voltage drops of the PN diode D1 and Schottky diode D2 are 0 7. V and 0 3. V, respectively. If ON denotes conducting state of the diode and OFF denotes non-conducting state of the diode, then in the circuit,

A.  both D1 and D2 are ON 
B. D1 is ON and D2 is OFF
C. both D1 and D2 are OFF 
D. D1 is OFF and D2 is ON
Answer : Option D
Explaination / Solution:

Alternatively, we can solve the problem by considering the current through two diodes. Here, the correct case is only considered. 
Case : Diode D1 is OFF, D2 is ON. For this case. The equivalent circuit is

From the circuit, we have
I1 = 0
I2 = 10 - 2.3/1.02
= 9.7/1.02
= 9.5 mA
Since, the current I2 is positive, So our assumption is correct.

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Q.4
In the following circuit employing pass transistor logic, all NMOS transistors are identical with a threshold voltage of 1 V . Ignoring the body-effect, the output voltages at P, Q and R are,

A. 4V, 3V, 2V
B. 5V, 5V, 5V
C. 4V, 4V, 4V
D. 5V, 4V, 3V
Answer : Option C
Explaination / Solution:
No Explaination.


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Q.5
Consider the following circuit using an ideal OPAMP. The I-V characteristic of the diode is described by the relation  where VT = 25 mV, I0 = 1μ A and V is the voltage across the diode (taken as positive for forward bias). For an input voltage Vi = -1 V, the output voltage V0 is

A. 0 V
B. 0.1 V
C. 0.7 V
D. 1.1 V
Answer : Option B
Explaination / Solution:



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Q.6
The peak electric field in the device is 
A. 0.15 MV . cm-1, directed from p -region to n -region
B. 0.15 MV . cm-1, directed from n -region to p -region
C. 1.80 MV . cm-1, directed from p-retion to n -region
D. 1.80 MV . cm-1, directed from n -region to p -region
Answer : Option B
Explaination / Solution:

The peak electric field in device is directed from p to n and is 



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Q.7
In IC technology, dry oxidation (using dry oxygen) as compared to wet oxidation (using steam or water vapor) produces
A. superior quality oxide with a higher growth rate
B. inferior quality oxide with a higher growth rate
C. inferior quality oxide with a lower growth rate
D. superior quality oxide with a lower growth rate
Answer : Option D
Explaination / Solution:

In IC technology, dry oxidation as compared to wet oxidation produces superior quality oxide with a lower growth rate

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Q.8
Drift current in the semiconductors depends upon
A. only the electric field
B. only the carrier concentration gradient
C. both the electric field and the carrier concentration
D. both the electric field and the carrier concentration gradient
Answer : Option C
Explaination / Solution:
No Explaination.


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Q.9
The amplifier circuit shown below uses a silicon transistor. The capacitors Cc and CE can be assumed to be short at signal frequency and effect of output resistance r0 can be ignored. If CE is disconnected from the circuit, which one of the following statements is true

A. The input resistance Ri increases and magnitude of voltage gain Av decreases
B. The input resistance Ri decreases and magnitude of voltage gain Av increases
C. Both input resistance Ri and magnitude of voltage gain Av decreases
D. Both input resistance Ri and the magnitude of voltage gain Av increases
Answer : Option A
Explaination / Solution:

The equivalent circuit of given amplifier circuit (when CE is connected, RE is short-circuited)


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Q.10
For the BJT QL in the circuit shown below,  The switch is initially closed. At time t = 0, the switch is opened. The time t at which Q1 leaves the active region is

A. 10 ms
B. 25 ms
C. 50 ms
D. 100 ms
Answer : Option C
Explaination / Solution:


Applying KCL at collector

with time, the capacitor charges and voltage across collector changes from 0 towards negative.


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EC Electronics and Communication Engineering