For the circuit shown in the figure, D has a transition from 0 to 1 after CLK changes from 1 to 0. Assume gate delays to be negligible. Which of the following statements is true
Answer : Option AExplaination / Solution: No Explaination.
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relationVolts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
The stable reading of the LED displays is
Answer : Option DExplaination / Solution:
and when VADC = 6.5 V (at 1101), the output of AND is zero and the counter stops. The stable output of LED display is 13.
In the following circuit, the comparators output is logic “1” if V1 > V2 and is logic "0" otherwise. The D/A conversion is done as per the relationVolts, where b3 (MSB), b1,b2 and b0 (LSB) are the counter outputs. The counter starts from the clear state.
The magnitude of the error between VDAC and Vin at steady state in volts is
Answer : Option BExplaination / Solution: No Explaination.
Q9.In a microprocessor, the service routine for a certain interrupt starts from a fixed location of memory which cannot be externally set, but the interrupt can be delayed or rejected Such an interrupt is
Answer : Option DExplaination / Solution:
Vectored interrupts : Vectored interrupts are those interrupts in which program control transferred to a fixed memory location.
Maskable interrupts : Maskable interrupts are those interrupts which can be rejected or delayed by microprocessor if it is performing some critical task.