Digital Circuits (Test 4)

Gate Exam : Ec Electronics And Communication Engineering

Digital Circuits

Digital Circuits
| Digital Circuits |
Q.1
The Boolean expression  can be minimized to
A.
B.
C.
D.
Answer : Option D
Explaination / Solution:



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Q.2
An 8255 chip is interfaced to an 8085 microprocessor system as an I/O mapped I/O as show in the figure. The address lines A0 and A1 of the 8085 are used by the 8255 chip to decode internally its thee ports and the Control register. The address lines A3 to A as well as the  signal are used for address decoding. The range of addresses for which the 8255 chip would get selected is

A. F8H - FBH
B. F8GH - FCH
C. F8H - FFH
D. F0H - F7H
Answer : Option C
Explaination / Solution:


                                     

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Q.3
In the circuit shown below, the op-amp is ideal, the transistor has VBE = 0.6 V and  β= 150. Decide whether the feedback in the circuit is positive or negative and determine the voltage V at the output of the op-amp.

A. Positive feedback, V = 10 V.
B. Positive feedback, V = 0 V
C. Negative feedback, V = 5 V
D. Negative feedback, V = 2 V
Answer : Option D
Explaination / Solution:

The circuit is shown in fig below

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Q.4
A two – bit counter circuit is shown below

It the state QAQof the counter at the clock time tn is ‘10’ then the state QAQB of the counter at tn + 3 (after three clock cycles ) will be
A. 00
B. 01
C. 10
D. 11
Answer : Option C
Explaination / Solution:



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Q.5
If X = 1 in logic equation Then
A. Y=Z
B.
C. Z=1
D. Z=0
Answer : Option D
Explaination / Solution:


Substituting X = 1 and we get
                                                                   1 + A = 1 and 0 + A = A

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Q.6
The Boolean expression  simplifies to
A. 1
B.
C. a. b
D. 0
Answer : Option D
Explaination / Solution:



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Q.7
The digital logic shown in the figure satisfies the given state diagram when Q1 is connected to input A of the XOR gate.

Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram ?
A.  Input A is connected to 
B.  Input A is connected to Q2
C.  Input A is connected to  and S is complemented
D. Input A is connected to 
Answer : Option D
Explaination / Solution:
No Explaination.


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Q.8
The two numbers represented in signed 2’s complement form are P + 11101101 and Q = 11100110. If Q is subtracted from P, the value obtained in signed 2’s complement is
A. 1000001111
B. 00000111
C. 11111001
D. 111111001
Answer : Option B
Explaination / Solution:



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Q.9
What are the minimum numbers of NOT gates and 2 - input OR gates required to design the logic of the driver for this 7 - Segment display
A. 3 NOT and 4 OR
B. 2 NOT and 4 OR
C. 1 NOT and 3 OR
D. 2 NOT and 3 OR
Answer : Option D
Explaination / Solution:

As shown in previous solution 2 NOT gates and 3-OR gates are required.

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Q.10
The output Y in the circuit below is always ‘1’ when

A. two or more of the inputs P, Q, R are ‘0’
B. two or more of the inputs P, Q, R are ‘1’
C. any odd number of the inputs P, Q, R is ‘0’
D. any odd number of the inputs P, Q, R is ‘1’
Answer : Option B
Explaination / Solution:

The given circuit is shown below:

If any two or more inputs are ‘1’ then output y will be 1.

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EC Electronics and Communication Engineering