Digital Circuits (Test 3)

Gate Exam : Ec Electronics And Communication Engineering

Digital Circuits

Digital Circuits
| Digital Circuits |
Q.1
A Boolean function f(A,B,C,D) = ∏(1,5,12,15) is to be implemented using an 8×1 multiplexer (A is MSB). The inputs ABC are connected to the select inputs S2S1S0 of the multiplexer respectively.
 
Which one of the following options gives the correct inputs to pins 0,1,2,3,4,5,6,7 in order?
A.
B.
C.
D.
Answer : Option B
Explaination / Solution:



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Q.2
For the circuit shown, the counter state (Q1Q0) follows the sequence

A. 00,01,10,11,00
B. 00,01,10,00,01
C. 00,01,11,00,01
D. 00,10,11,00,10
Answer : Option A
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Q.3
A portion of the main program to call a subroutine SUB in an 8085 environment is given below. : : LXI D,DISP LP : CALL SUB : It is desired that control be returned to LP+DISP+3 when the RET instruction is executed in the subroutine. The set of instructions that precede the RET instruction in the subroutine are
A.
B.
C.
D.
Answer : Option C
Explaination / Solution:
No Explaination.


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Q.4
The current state QAQB of a two JK flip-flop system is 00. Assume that the clock rise-time is much smaller than the delay of the JK flip-flop. The next state of the system is

A. 00
B. 01
C. 11
D. 10
Answer : Option C
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Q.5
The circuit shown below is an example of a

A. low pass filter.
B. band pass filter.
C. high pass filter.
D. notch filter.
Answer : Option A
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Q.6
In the sum of products function f (X, Y, Z) = ∑(2, 3, 4, 5), the prime implicants are
A.
B.
C.
D.
Answer : Option A
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Q.7
The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is
A. 4
B. 6
C. 8
D. 10
Answer : Option B
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Q.8
The output expression for the Karnaugh map shown below is

A.
B.
C.
D.
Answer : Option D
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Q.9
For each of the positive edge-triggered J - K flip flop used in the following figure, the propagation delay is Δt .

Which of the following wave forms correctly represents the output at Q1?
A.
B.
C.
D.
Answer : Option B
Explaination / Solution:

Since the input to both JK flip-flop is 11, the output will change every time with clock pulse. The input to clock is

The output Q0 of first FF occurs after time ΔT and it is as shown below

The output Q1 of second FF occurs after time ΔT when it gets input (i.e. after ΔT from t1) and it is as shown below


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Q.10
For 8085 microprocessor, the following program is executed.
MVI A, 05H;
MVI B, 05H;
PTR: ADD B;
DCR B;
JNZ PTR;
ADI 03H;
HLT;
At the end of program, accumulator contains
A. 17H
B. 20H
C. 23H
D. 05H
Answer : Option A
Explaination / Solution:

The program is being executed as follows
MVI A, 0.5H; A = 05H
MVI B, 0.5H; B = 05H
At the next instruction, a loop is being introduced in which for the instruction “DCR B” if the result is zero then it exits from loop so, the loop is executed five times as follows :

i.e., A = 05 + 05 + 04 + 03 + 02 + 01 = 144
At this stage, the 8085 microprocessor exits from the loop and reads the next instruction. i.e., the accumulator is being added to 03 H. Hence, we obtain A = A + 03 H = 14 + 03 = 17 H


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EC Electronics and Communication Engineering