# Computer Organization and Architecture (Test 1)

## Gate Exam : Cs Computer Science And Information Technology

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Computer Organization and Architecture
| Computer Organization and Architecture |
Q.1
How many 32K × 1 RAM chips are needed to provide a memory capacity of 256 K-bytes =
A. 8
B. 32
C. 64
D. 128
Explaination / Solution:
No Explaination.

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Q.2
Consider the following processors (ns stands for nanoseconds). Assume that the pipeline registers have zero latency.
P1: Four-stage pipeline with stage latencies 1 ns, 2 ns, 2 ns, 1 ns.
P2: Four-stage pipeline with stage latencies 1 ns, 1.5 ns, 1.5 ns, 1.5 ns.
P3: Five-stage pipeline with stage latencies 0.5 ns, 1 ns, 1 ns, 0.6 ns, 1 ns.
P4: Five-stage pipeline with stage latencies 0.5 ns, 0.5 ns, 1 ns, 1 ns, 1.1 ns.
Which processor has the highest peak clock frequency?

A. P1
B. P2
C. P3
D. P4
Explaination / Solution:

Clock period (CP) = max stage delay + overhead

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Q.3
Consider a 4 stage pipeline processor. The number of cycle needed by the four instructions I1,I2,I3,I4 in stages S1, S2, S3, S4 is shown below:

What is the number of cycles needed to execute the following loop? for (i=1 to 2) {I1; I2; I3; I4 ;}
A. 16
B. 23
C. 28
D. 30
Explaination / Solution:
No Explaination.

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Q.4
A multilevel page table is preferred in comparison to a single level page table for translating virtual address to physical address because
A. It reduces the memory access time to read or write a memory location
B. It helps to reduce the size of page table needed to implement the virtual address space of a process
C. It is required by the translation look a side buffer
D. It helps to reduce the number of page faults in page replacement algorithms.
Explaination / Solution:
No Explaination.

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Q.5
Consider the basic COCOMO model where E is the effort applied in person-months, D is the development time in chronological months, KLOC is the estimated number of delivered lines of code (in thousands) and ab ,bb , cb ,db have their usual meanings. The basic COCOMO equations are of the form
A. E = ab (KLOC) exp (bb), D = cb (E)exp(db)
B. D = ab (KLOC) exp (bb), E = cb (D)exp(db)
C. E = ab exp (bb), D = cb (KLOC)exp(db)
D. E = ab exp (db), D = cb (KLOC)exp(bb)
Explaination / Solution:
No Explaination.

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Q.6
A software requirements specification (SRS) document should avoid discussing which one of the following?
A. User interface issues
B. Non-functional requirements
C. Design specification
D. Interfaces with third party software
Explaination / Solution:

SRS is a description of a software system to be developed, laying out functional & nonfunctional requirements and may include a set of use cases that describe interactions the user will have with the software.

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Q.7
Consider a hypothetical processor with an instruction of type LW R1, 20(R2), which during execution reads a 32-bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?
Explaination / Solution:

Here 20 will act as base and content of R2 will be index

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Q.8
Consider a processor with byte-addressable memory. Assume that all registers, including Program Counter (PC) and Program Status Word (PSW), are of size 2 bytes. A stack in the main memory is implemented from memory location (0100)16 and it grows upward. The stack pointer (SP) points to the top element of the stack. The current value of SP is (016E)16. The CALL instruction is of two words, the first word is the op-code and the second word is the starting address of the subroutine. (oneword = 2bytes). The CALL instruction is implemented as follows:
 Store the current Vale of PC in the Stack
 Store the value of PSW register in the stack
The content of PC just before the fetch of a CALL instruction is (5FA0)16. After execution of the CALL instruction, the value of the stack pointer is
A. (016A)16
B. (016C)16
C. (0170)16
D. (0172)16
Explaination / Solution:
No Explaination.

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Q.9
Host A sends a UDP datagram containing 8880 bytes of user data to host B over an Ethernet LAN. Ethernet frames may carry data up to 1500 bytes (i.e. MTU = 1500 bytes). Size of UDP header is 8 bytes and size of IP heard is 20 bytes.There is no option field in IP header How many total number of IP fragments will be transmitted and what will be the contents of offset field in the last fragment?
A. 6 and 95
B. 6 and 7400
C. 7 and 1110
D. 7 and 8880
Explaination / Solution:

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Q.10
A company needs to develop digital signal processing software for one of its newest inventions. The software is expected to have 40000 lines of code. The company needs to determine the effort in person-months needed to develop this software using the basic COCOMO model. The multiplicative factor for this model is given as 2.8 for the software development on embedded systems, while the exponentiation factor is given as 1.20. What is the estimated effort in personmonths?
A. 234.25
B. 932.50
C. 287.80
D. 122.40